A metal oxide semiconductor (MOS) transistor typically has a structure in which a gate insulating film made of silicon oxide is formed on a silicon substrate, and a gate electrode made of polysilicon is formed on the gate insulating film and is used as an insulated gate electrode. Impurity ion implantation for forming source/drain regions is also conducted on the polysilicon gate electrode, and thereby a basic threshold adjustment is conducted.
In order to increase the degree of integration of semiconductor integrated circuit devices and to increase the speed thereof, size reduction of metal oxide semiconductor transistors has been achieved in accordance with a scaling law. When the thickness of the silicon oxide gate insulating film is reduced to about 2 nm or less, a direct tunneling current flowing between the gate electrode and the silicon substrate increases, thereby considerably increasing the gate leakage current. Even when the material of the gate insulating film is changed, the direct tunneling current increases as the thickness of the gate insulating film decreases to a certain value or less.
To address the problem of an increase in the gate leakage current, a configuration is adopted in which a high-dielectric-constant insulating material having a higher dielectric constant than the dielectric constant of silicon oxide is used as a gate insulating film, and the physical thickness of the gate insulating film is increased while reducing the equivalent oxide thickness (EOT). When a high-dielectric-constant insulating material having a dielectric constant k times larger than the dielectric constant of silicon oxide is used, the EOT does not change even when the film thickness of the insulating material is increased by k times, thus maintaining controllability of the gate electrode. In order to maintain a surface of a silicon substrate in good condition, a high-dielectric-constant insulating film is usually deposited on a thermally oxidized silicon oxide film having a small thickness.
An oxide including hafnium (Hf), for example, HfO or HfSiO, is typically used as such a high-dielectric-constant insulating material. Note that although the stoichiometric composition of hafnium oxide is HfO2, hafnium oxide is denoted by HfO because the composition may be changed either intentionally or by controlling a production process. Hafnium oxides including HfSiO, HfSiON etc. in which silicon (Si) is added to HfO are denoted by HfO. Other compounds are also represented by similar notation. For example, aluminum oxide (stoichiometric composition: Al2O3) is denoted by AlO and lanthanum oxide (stoichiometric composition: La2O3) is denoted by LaO.
Such a polysilicon gate electrode is doped with an impurity to have an n-type conductivity or a p-type conductivity, and a reverse-bias gate voltage is applied to the gate electrode. For example, the gate electrode of an n-channel metal-oxide semiconductor (NMOS) transistor is made of n-type polysilicon, and an ON-voltage of the positive polarity is applied to the gate electrode. In a diode structure including an n-type polysilicon gate electrode, a gate insulating film, and a p-type channel region of a silicon substrate, by applying a reverse-bias voltage, a depletion layer is formed on an interface side of the gate electrode, the interface being disposed between the gate electrode and the gate insulating film. The depletion layer functions as in the gate insulating film to decrease the capacitance of the gate electrode, resulting in a decrease in controllability by the gate voltage.
In addition, the resistivity of polysilicon is not sufficiently low. When the cross-sectional area of the gate electrode is reduced with size reduction of transistors, the resistance of polysilicon is not negligible. Furthermore, in general, electrical conductivity is imparted to a polysilicon gate electrode by ion-implanting an impurity. However, when the ion-implanted impurity passes through a gate insulating film and enters a channel region, transistor characteristics are degraded.
To suppress these phenomena, research and development has been performed on a configuration in which a gate electrode is formed of a metal instead of polysilicon. A metal gate electrode does not cause depletion of electrons, has a low resistance, and does not need impurity implantation. Note that the term “metal gate electrode” means a gate electrode made of an electrically conductive material that exhibits a metallic electrical conductivity for which the electrical resistance increases with an increase in the temperature, examples of such an electrically conductive material including not only pure metals, but also intermetallic alloys, electrically conductive metal nitrides such as titanium nitride (TiN), electrically conductive metal oxides such as iridium oxide (IrO), and silicides such as nickel silicide (NiSi).
In forming an n-channel metal-oxide semiconductor (NMOS) transistor and a p-channel metal-oxide semiconductor (PMOS) transistor, if gate insulating films made of the same material are formed and metal gate electrodes made of the same material are formed on the corresponding gate insulating film, the function of the basic threshold adjustment achieved by polysilicon gate electrodes is lost. In order to adjust the threshold, it is preferable to change at least one of the material of the metal gate electrodes and the material of the gate insulating films in the NMOS transistor and the PMOS transistor. In order to simplify the production process, steps of producing the NMOS transistor and steps of producing the PMOS transistor are preferably shared as much as possible. It is known that the threshold may be adjusted by selectively forming a cap layer on a high-dielectric-constant insulating film serving as a gate insulating film. More specifically, a cap layer made of LaO or the like is formed for an NMOS transistor and a cap layer made of AlO or the like is formed for a PMOS transistor, and lanthanum (La) or aluminum (Al) then diffuses into the corresponding high-dielectric-constant insulating film, whereby the threshold is adjusted.
Japanese National Publication of International Patent Application (Translation of PCT Application) No. 2007-537595 proposes a configuration in which a first gate dielectric material and a second gate dielectric material have different compositions, and a first gate electrode provided on the first gate dielectric material and a second gate electrode provided on the second gate dielectric material have the same composition and the same film thickness. For example, a gate dielectric material of an NMOS transistor is made up of a laminate including a hafnium oxide layer and a lanthanum oxide layer provided on the hafnium oxide layer, and a gate dielectric material of a PMOS transistor is made up of a single hafnium oxide layer or a laminate including a hafnium oxide layer and an aluminum oxide layer provided on the hafnium oxide layer. Gate electrodes made of tantalum carbide (TaC) or tantalum silicon nitride (TaSiN) are stacked on each of the gate dielectric materials, and an electrically conductive layer made of polysilicon or tungsten (W) is stacked on each of the gate electrodes.
According to a report made by Morooka et al.: Extended Abstracts of the 2008 International Conference on Solid State Devices and Materials, pp. 24-25, 2008, in a structure in which an Al2O3 cap layer is formed on a HfO2 film, when a low-temperature annealing is performed prior to the deposition of the Al2O3 cap layer and a high-temperature annealing is performed at, for example, about 1,050° C. after the deposition of the Al2O3 cap layer, an increase in the equivalent oxide thickness is suppressed without causing a threshold shift.
Hickmott: J. Appl. Phys. 51(8) pp. 4269-4281, 1980, describes that, by conducting annealing, a dipole layer disposed at an interface between a metal film and an insulating film contributes to the adjustment of the barrier height, the work function, and the like.
International Laid-open Patent Publication No. 2008-166713 proposes a method of forming cap layers on a high-dielectric-constant insulating film, the cap layers being made of different materials. In this method, a sacrificial film is selectively formed, a first cap layer is formed on the high-dielectric-constant insulating film in regions in which the sacrificial film is not provided, the sacrificial film and the first cap layer provided thereon are removed, and a second cap layer is then formed on the exposed high-dielectric-constant insulating film.